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Kapittel 1 · Kretsteori
Current Divider: How Two Parallel Resistors Split the Current
Current divider — two resistors in parallel across a current source I_in split the total current as I_1 = I_in · R_2/(R_1+R_2) and I_2 = I_in · R_1/(R_1+R_2); the smaller resistor steals the larger share. Genuine animation in Beat 4: R_2 scrubs and the two branch-current arrows swell/shrink with live percentages.
Kirchhoff's Current Law: Why a Node Adds to Zero
Kirchhoff's current law — at every node, the sum of currents flowing in equals the sum of currents flowing out; this is charge conservation, since the node has no capacity to store charge
Kirchhoff's Voltage Law: Why a Loop Sums to Zero
Kirchhoff's voltage law — walking around any closed loop, the sum of every voltage rise and drop equals zero; this is just energy conservation for charges returning to the same potential
Ohm's Law: How Voltage, Current, and Resistance Connect
Ohm's law — V = I·R; sweeping V scales I linearly, sweeping R bends I as 1/R.
Voltage Divider: Why Two Resistors Split the Voltage
Voltage divider — two resistors in series across a source put V_out = V_in · R2/(R1+R2) at the midpoint; sweeping R2 sweeps V_out proportionally
Kapittel 2 · Energi og effekt
Energy in a Capacitor: Why It's One Half C V Squared
Energy stored in a capacitor — pushing charge against a rising voltage; the work integral ∫V dq from 0 to Q traces a triangle of area ½QV, giving the three equivalent forms ½CV², ½QV and Q²/(2C)
Energy in an Inductor: Why It's One Half L I Squared
Energy stored in an inductor — ramping current builds a magnetic field; the work integral ∫v·i dt collapses to ½LI² via Φ = L·I, giving the three equivalent forms ½LI², ½ΦI, and Φ²/(2L)
Joule Heating: How a Resistor Turns Current into Heat
Joule heating in a resistor — every charge crossing a resistor drops potential V·q which becomes heat; instantaneous power P = V·I = I²R = V²/R; total dissipated energy W = P·t accumulates linearly while the current flows
Maximum Power Transfer: Match the Load to the Source
Maximum power transfer theorem — a source with internal resistance R_s delivers the most power into a load R_L when R_L equals R_s; the load power P_L = V_s²·R_L/(R_s+R_L)² peaks at R_L = R_s with value V_s²/(4R_s) and efficiency 50%
The Power Triangle: Why Not Every Volt-Amp Becomes a Watt
AC power decomposes into real power P (watts) along the in-phase axis, reactive power Q (vars) along the quadrature axis, and apparent power S (VA) as the hypotenuse. Sweeping the phase angle phi from 0 to 90 degrees morphs the triangle: P shrinks, Q grows, |S| stays fixed, cos phi (the power factor) falls from one to zero. Genuine motion in Beat 4: phi sweeps as a triangle wave, the triangle redraws each frame, live readout of P/S, Q/S, and cos phi.
Kapittel 3 · Superposisjon og Thévenin
Source Transformations: A Battery and a Current Source Are the Same Thing
Two-terminal equivalence between a voltage source in series with R and a current source in parallel with R — the live morph of a Thévenin network into its Norton counterpart, with open-circuit and short-circuit tests as the proof.
Superposition: One Source at a Time
Superposition: kill one source at a time, solve the linear sub-circuits, sum the responses.
Thévenin's Theorem: Any Linear Circuit Becomes One Source
Thévenin's theorem — any linear two-terminal network can be replaced by an open-circuit voltage V_th in series with an equivalent resistance R_th; the load sees the same current and voltage either way
Kapittel 4 · Dioder
Full-Wave Bridge Rectifier: Both Halves of the Wave
Full-wave bridge rectifier — four diodes arranged in a bridge route both halves of an AC sine wave through the load in the same direction; the output is the absolute value of the input, doubling the ripple frequency over a half-wave rectifier
Half-Wave Rectifier: How a Diode Turns AC into Pulses
Half-wave rectifier — a diode in series with a load conducts on positive half-cycles and blocks on negative, turning an AC sinusoid into a one-sided pulse train
The Diode Clamper: Lift the AC, Keep the Shape
Positive diode clamper — a series capacitor and a shunt diode shift an AC sine wave upward by its peak so the negative peaks sit at zero, without changing the shape. The capacitor charges once on the first negative half-cycle and then acts as a constant DC offset on every cycle thereafter. Genuine motion in Beat 3: diode highlights, charge dots flow, V_C climbs to V_p, live readout panel. Genuine motion in Beat 4: synchronised scope traces of V_in (centred on zero) and V_out (centred on +V_p) with cursor + offset arrow.
Zener Clipper: A Diode That Caps the Peaks
Zener diode reverse breakdown clamps a sine input's peaks to V_Z — clipper / regulator.
Kapittel 5 · Digital elektronikk
Binary Addition: How the Carry Walks Left
4-bit binary addition column-by-column with the carry walking right-to-left — visualises 0101 + 0111 = 1100 (5 + 7 = 12) one column at a time, then motivates ripple-carry's worst-case delay in hardware.
Counting in Hexadecimal: Four Bits, One Symbol
Hexadecimal as a packing of binary — every 4-bit nibble maps to exactly one hex symbol 0..F; an 8-bit byte becomes two hex digits. The radix is base 16 with place values 16⁰, 16¹, 16², which is why programmers prefer hex for memory addresses, byte patterns, and machine code.
NAND is Universal: One Gate Builds Them All
NAND universality — NOT, AND, and every Boolean function can be built from NAND gates alone; tying inputs together makes a NOT, chaining a NAND into a NOT makes an AND, signals propagate through the cascade with the truth table updating in real time
Two's Complement: How Computers Carry a Minus Sign
Two's complement signed integers — flip every bit (one's complement) and add one to negate. The MSB becomes a sign bit, addition stays exactly the same as for unsigned integers, and a 4-bit register covers −8 to +7.
Kapittel 6 · Transistorer
BJT Load Line: Where the Operating Point Lives
Common-emitter NPN amplifier — the DC load line V_CE = V_CC − I_C·R_C is fixed by the supply and the collector resistor; sweep the base current I_B and the operating point Q slides along that line through cutoff, the active region, and into saturation.
The CMOS Inverter: Two Transistors, Zero Static Power
CMOS inverter — PMOS to V_DD, NMOS to ground, gates tied to V_in, drains tied to V_out. Only one transistor conducts at a time, so the output flips between V_DD and 0 with essentially no static current. Sweeping V_in across the threshold produces the sharp transfer curve at the heart of every digital logic family.
The MOSFET as a Switch: How a Voltage Opens a Channel
NMOS as a digital switch — when V_GS is below the threshold V_t the channel is empty and the transistor is off; raise V_GS above V_t and a conducting channel forms, dropping R_DS and turning the transistor on. Wire it as an inverter and the output flips with the input.
Kapittel 7 · Minne og register
D Flip-Flop: One Bit of Memory at the Clock Edge
D flip-flop — an edge-triggered storage cell whose output Q samples the input D at every rising edge of the clock; the cell behind every register and counter
JK Flip-Flop: The SR Latch With a Useful Fourth Row
JK flip-flop — the SR latch with the forbidden S=R=1 state replaced by a TOGGLE mode (Q flips on each rising clock edge when J=K=1); the four modes hold/reset/set/toggle and the divide-by-two behaviour are the workhorse of every binary counter.
Ripple Counter: How Four Toggle Flip-Flops Count to Sixteen
4-bit asynchronous ripple counter — chain four toggle (J = K = 1) flip-flops with each Q driving the next stage's clock. Each stage halves the frequency, so Q_0 is the LSB toggling every clock and Q_3 is the MSB toggling every eight clocks; together they spell out a binary count from 0 to 15. The 'ripple' name comes from the propagation-delay cascade — bits flip one stage at a time.
SR Latch: Two NOR Gates Remember a Bit
Cross-coupled NOR gates form an SR latch — S sets Q=1, R resets Q=0, S=R=0 holds.
Kapittel 8 · Reaktive elementer
Phasors: A Rotating Arrow Becomes a Sinusoid
Phasor representation of an AC voltage — a vector of length V_m rotating at angular frequency ω; its real-axis projection traces v(t) = V_m cos(ωt + φ); two phasors at a fixed phase difference give two locked sinusoids
RC Charging: Why a Capacitor Fills on an Exponential Curve
RC charging transient — a battery, resistor and capacitor in series; after the switch closes the capacitor voltage rises as V_C(t) = V_0(1 − e^{−t/τ}); the time constant τ = RC sets the speed (63% at one τ, ≈99% after five τ).
RC High-Pass Filter: Why Gain Rolls In Past the Cutoff
RC high-pass filter — capacitor in series, resistor to ground, V_out across the resistor; H(jω) = jωRC / (1 + jωRC); gain rises at +20 dB/decade below ω_c = 1/RC and is flat at 0 dB above; phase shifts from +90° (lead) down to 0°. Sister scene to low-pass-bode with the roles swapped.
RC Low-Pass Filter: Why Gain Rolls Off at the Cutoff
RC low-pass filter — transfer function H(jω) = 1/(1 + jωRC); gain stays flat below the cutoff ω_c = 1/RC and rolls off at −20 dB/decade above; Bode magnitude and phase together describe the filter at every frequency
RL Transient: Why an Inductor Slows the Current
Series RL transient — when the switch closes, current rises along i(t) = (V/R)(1 − e^{−t/τ}) with τ = L/R, because the inductor opposes any change in current and develops a back-emf that decays as the current settles; the inductive twin of RC charging.
RLC Resonance: Where the Reactances Cancel
Series RLC resonance — sweep frequency and watch the loop current peak at ω₀ = 1/√(LC) where X_L and X_C exactly cancel; three phasor diagrams show how V_L and V_C oppose perfectly at resonance, leaving only V_R.
Kapittel 9 · Operasjonsforsterker
Inverting Op-Amp: The Virtual Short Does the Algebra
Inverting op-amp — V+ grounded, V− driven to a virtual ground by feedback, KCL at the summing junction gives V_out = −(R_f/R_in)·V_in; the op-amp's own gain never enters the answer because the feedback loop forces V− to match V+
Summing Amplifier: Add Voltages at the Virtual Ground
Summing amplifier: KCL at the inverting node produces V_out = -R_f·Σ(V_k/R_k).
The Integrator Op-Amp: Square Wave In, Triangle Wave Out
Op-amp integrator — replace the inverting amp's feedback resistor with a capacitor and the virtual short turns the circuit into a time integrator V_out(t) = −(1/RC)∫V_in dt; a square-wave input produces a linear triangle-wave output whose slope is set by 1/RC.
Kapittel 10 · Digital design
2-to-4 Decoder: One-Hot Output Selection
2-to-4 decoder — two address bits drive four AND gates so exactly one output is high.
4-to-1 Multiplexer: Two Select Bits Pick a Wire
4-to-1 multiplexer — four data inputs (D0..D3) and two select inputs (S1, S0) feed into a logic block that routes whichever input is addressed by the select bits to a single output Y; demonstrates how 2^n select bits address 2^n data lines
Finite State Machines: A Circuit That Remembers Where It Was
Finite state machines — a graph of states and labelled transitions models any sequential circuit; a Moore-style 11-detector with three states walks an input bit-stream and asserts its output whenever the last two bits were ones
Karnaugh Maps: Grouping Adjacent Ones
Karnaugh map minimization — a 3-variable function laid out on a Gray-coded grid; adjacent ones grouped into power-of-two rectangles collapse to the simplest sum-of-products form, beating algebra at its own game
The 8-to-3 Priority Encoder: When Many Speak, One Wins
8-to-3 priority encoder — eight input lines I0..I7, three output bits Y2 Y1 Y0, plus a Valid flag. The output is the 3-bit binary index of the highest-indexed active input; when multiple inputs are HIGH at once, the highest index wins and the others are ignored. Genuine motion in Beat 4: a sequence of curated input patterns plays out, with each frame computing the output bits and Valid flag from the current pattern in real time, and a halo highlighting the winning input.